100 MHz state analysis with 2 state clocks/qualifiers
Conventional timing offers resolution down to 2 ns
Transitional timing captures data bursts separated by
long time periods
通訊編程接口 RS232 HP-IB
可與電腦傳輸數據或由電腦編程控制,HP B3740A 軟件可進行源代碼行引用,this is the ability to see
correlated high-level C++ source code with the inverse assembled state
listing.
Well suited for programmable logic and 8-bit
microprocessor systems
示波器功能
雙通道
帶寬250MHz
取樣 1GSa/s
記錄長度8K
Edge, voltage level and pattern duration triggering and automatic pulse parameters.
Characterize critical timing
parameters with time interval measurements of better than 150 ps accuracy, or
examine glitches in your system to determine if noise or loading is a problem.